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1994 data sheet mos integrated circuit the m pd6121, 6122 are infrared remote control transmission ics using the nec transmission format that are ideally suited for tvs, vcrs, audio equipment, air conditioners, etc. by combining external diodes and resistors, a maximum of 65,536 custom codes can be specified. these ics come in small packages, thus facilitating the design of light and compact remote control transmitters. the nec transmission format consists of leader codes, custom codes (16 bits), and data codes (16 bits). it can be used for various systems through decoding by a microcontroller. features ? low-voltage operation: v dd = 2.0 to 3.3 v ? low current dissipation: 1 m a max. (at standby) ? custom codes: 65,536 (set by external diodes and resistors) ? data codes: ? m pd6121: 32 codes (single input), 3 codes (double input), expandable up to 64 codes through sel pin ? m pd6122: 64 codes (single input), 3 codes (double input), expandable up to 128 codes through sel pin ? m pd6121, 6122 are transmission code-compatible (nec transmission format) with the m pd1913c note , 1943g note , 6102g note , and 6120c note . ? pin compatibility: ? m pd6121g-001 is pin-compatible with the m pd1943g (however, capacitance of capacitor connected to oscillator pin and other parameters vary) ? m pd6122g-001 is pin-compatible with the m pd6102g (however, capacitance of capacitor connected to oscillator pin and other parameters vary) ? standard products (ver. i, ver. ii specifications) note provided for maintenance purpose only ? when using this product (in nec transmission format), please order custom codes from nec. ? new custom codes for the m pd6121g-002, m pd6122g-002 cannot be ordered. m pd6121, 6122 the information in this document is subject to change without notice. the mark shows revised points. document no. u10114ej6v0ds00 (6th edition) (previous no. ic-1813) date published october 1995 p) printed in japan remote control transmission cmos ic * * * * data sheet 1994
m pd6121, 6122 2 ordering information part number package description m pd6121g-001 20-pin plastic sop (375 mil) standard (ver i spec.) m pd6121g-002 20-pin plastic sop (375 mil) standard (ver ii spec.) m pd6122g-001 24-pin plastic sop (375 mil) standard (ver i spec.) m pd6122g-002 24-pin plastic sop (375 mil) standard (ver ii spec.) pin configuration (top view) pin identifications ccs : custom code selection input rem : remote output ki 0 - ki 7 : key input sel : sel input ki/o 0 - ki/o 7 : key input/output v dd : power supply pin lmp : lamp output v ss : gnd pin osci, osco: resonator connection pin * 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 ki 0 ki 1 ki 2 ki 3 rem v dd sel osco osci v ss ccs ki/o 0 ki/o 1 ki/o 2 ki/o 3 ki/o 4 ki/o 5 ki/o 6 ki/o 7 lmp ?d6121 ?d6121g-001 ?d6121g-002 ?d6122 1 2 3 4 5 6 7 8 9 10 24 23 22 21 20 19 18 17 16 15 ki 2 ki 3 ki 4 ki 5 ki 6 ki 7 rem v dd sel osco ki 1 ki 0 ccs ki/o 0 ki/o 1 ki/o 2 ki/o 3 ki/o 4 ki/o 5 ki/o 6 ?d6122g-001 ?d6122g-002 11 14 osci 12 13 v ss lmp ki/o 7
m pd6121, 6122 3 block diagram note m pd6121: ki 0 - ki 3 m pd6122: ki 0 - ki 7 differences between products part number m pd6121 m pd6122 item operating voltage v dd = 2.0 to 3.3 v current consumption 1 m a max. (at standby) custom codes 65,536 (16-bit setting) data codes 32 x 2 64 x 2 no. of ki pins 4 8 no. of ki/o pins 8 sel pin provided transmission format nec transmission format package 20-pin plastic sop (375 mil) 24-pin plastic sop (375 mil) * osco osci v dd lmp rem v ss ki/o 7 ki/o 6 ki/o 5 ki/o 4 ki/o 3 ki/o 2 ki/o 1 ki/o 0 ki 0 ?ki n note key input circuit timing generator frequency divider oscillator output circuit controller data register key input/output circuit sel ccs
m pd6121, 6122 4 1. pin functions (1) key input pins (ki 0 to ki 7 ), key input/output pins (ki/o 0 to ki/o 7 ) a pull-down resistor is placed between key input pins and a v ss pin. when several keys are pressed simultaneously, the transmission of the corresponding signals is inhibited by a multiple-input prevention circuit. in the case of double-key input, transmission is inhibited if both keys are pressed simultaneously (within 36 ms interval); if not pressed simultaneously, the priority of transmission is first key, then second key. when a key is pressed, the custom code and data code reading is initiated, and 36 ms later, output to rem output is initiated. thus if the key is pressed during the initial 36 ms, one transmission is performed. if a key is kept pressed for 108 ms or longer, only leader codes are consecutively transmitted until the key is released. keys can be operated intermittently at intervals as short as 126 ms (interval between two ons), making this an extremely fast-response system. ( 2) resonator connection pins (osci, osco) the oscillator starts operating when it receives a key input. use a ceramic resonator with a frequency between 400 and 500 khz. (3) power-supply pin the power supply voltage is supplied by two 3-v batteries. a broad range of operating power supply voltage is allowed, from 2.0 to 3.3 v. the supply current falls below 1 m a when the oscillator is inactive when no keys are pressed. (4) rem output pin the rem output pin outputs the transmission code, which consists of the leader code, custom code (16 bits), and data code (16 bits) (refer to 2. nec transmission format (rem output) ). (5) sel input pin by controlling d 7 of the data code with this pin, the m pd6121 and m pd6122 can transmit 64 and 128 different data codes, respectively. by connecting the sel pin to v dd or v ss , d 7 is set to 0 or 1, respectively. this pin has high-impedance input, therefore be sure to connect it either to v dd or v ss . (6) ccs input pin by placing a diode between the ccs pin and the ki/o pin, it is possible to set a custom code. when a diode is connected, the corresponding custom code is 1, and when not connected, it is 0. (7) lmp output pin the lmp pin outputs a low-level signal while the rem pin outputs a transmission code.
m pd6121, 6122 5 2. nec transmission format (rem output) the nec transmission format consists of the transmission of a leader code, 16-bit custom codes (custom code, custom code), and 16-bit data codes (data code, data code) at one time, as shown in figure 2-1. also refer to 4. remote output waveform . data code is the inverted code of data code. the leader code consists of a 9-ms carrier waveform and a 4.5-ms off waveform and is used as leader for the ensuing code to facilitate reception detection. codes use the ppm (pulse position modulation) method, and the signals 1 and 0 are fixed by the interval between pulses. figure 2-1. rem output code cautions 1. use any of the possible 256 kinds of custom codes specified with 00xxh (diode not connected), as desired. if intending to use custom codes other than 00xxh, please consult nec in order to avoid various types of errors from occurring between systems. 2. when receiving data in the nec transmission format, check that the 32 bits made up of the 16-bit custom code (custom code, custom code) and the 16-bit data code (data code, data code) are fully decoded, and that there are no signals with the 33rd bit and after (be sure to check also data code). c 0 c 1 c 2 c 3 c 4 c 5 c 6 c 7 c 0 ? 1 ? 2 ? 3 ? 4 ? 5 ? 6 ? 7 d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 c 0 c 1 c 2 c 3 c 4 c 5 c 6 c 7 or c 0 or or or or or or or c 1 c 2 c 3 c 4 c 5 c 6 c 7 = = = = = = = = custom code custom code data code data code leader code
m pd6121, 6122 6 3. custom code (custom code, custom code?) setting the custom code is set in two different ways depending on whether ver i or ver ii specifications are employed. figure 3-1. custom code setting ver i ver ii remark the m pd6121-001 has ver i specifications and is pin-compatible with the m pd1943g, and the m pd6122- 001 has ver i specifications and is pin-compatible with the m pd6102g. if used as pin-compatible products, please note the following points. 1 connect the sel pin to v dd . 2 change the capacitance of the capacitor connected to the resonator connection pin (refer to 9. electrical specifications ). a custom code setting example is shown below. 3.1 standard versions with ver i specs. ( m pd6121-001, m pd6122-001) each of the higher 8 bits of the custom code is set to 1 when a diode is connected between the ccs pin and the corresponding ki/o pin, and is set to 0 when no diode is connected. if a pull-up resistor is connected to the ki/o pin corresponding to one of the lower 8 bits of the custom code, the bit is first set to 1. based on the 1s information of the lower 8 bits of the custom code, the corresponding bit of the higher 8 bits of the custom code is then captured and not inverted. the non-inverted value is finally overwritten to the corresponding bit of the lower 8 bits of the custom code. the inverse occurs when no pull-up resistor is connected. it follows from the above that the custom code can be set in 65,536 different ways depending on whether or not a diode and/or pull-up resistor are present. please refer to figure 3-2 example of custom code setting for ver i specifications ( m pd6121-001, 6122- 001) . figure 3-2. example of custom code setting for ver i specifications ( m pd6121-001, 6122-001) configuration example higher 8 bits of custom code fixed by external diode bit c 0 , c 1 , c 2 ... fixed by connecting ccs pin and either one of pins ki/o 0 to ki/o 7 c 3 to c 7 ... fixed by absence or presence of external pull-up resistor for ki/o 6 , ki/o 7 lower 8 bits of custom code fixed by external pull-up resistor bit fixed by external pull-up resistor (ki/o 0 to ki/o 5 ) bit ccs ki/o 0 ki/o 1 ki/o 2 ki/o 3 ki/o 4 ki/o 5 ki/o 6 ki/o 7 v dd v dd * *
m pd6121, 6122 7 the higher 8 bits of the custom code are determined by the diode connected to the ccs pin and ki/o pin. set custom code the inversion/non-inversion of the lower 8 bits of the custom code is determined by the pull-up resistor connected to the ki/o pin. set custom code when the above-described setting is done, the following custom code is output. custom code remark codes are transmitted from the lsb. higher 8 bits of custom code 10001010 c 0 c 1 c 2 c 3 c 4 c 5 c 6 c 7 set to ??by diode 1 c 0 1 c 0 lower 8 bits of custom code 1111101 c 1 ? 2 ? 3 ? 4 ? 5 ? 6 ? 7 0 c 1 0 c 2 0 c 3 1 c 4 0 c 5 1 c 6 0 c 7 c 0 c 1 c 2 c 3 c 4 c 5 c 6 c 7 higher 8 bits of custom code lower 8 bits of custom code 10001000 c 0 ? 1 ? 2 ? 3 ? 4 ? 5 ? 6 c 7 set to ??by pull-up resistor, that is, bit for non-inversion of custom code is set 1: non-inversion for c 0 to c 7 0: inversion for c 0 to c 7
m pd6121, 6122 8 3.2 standard versions with ver ii specs. ( m pd6121-002, 6122-002) in ver ii, the ccs pin does not have the external diode reading function. the allocation of c 2 , c 1 and c 0 of the higher 8 bits of the custom code is done by connecting the ccs pin to any one of the ki/o 0 to ki/o 7 pins, as shown below. the allocation of c 7 , c 6 , c 5 , c 4 and c 3 of the higher 8 bits of the custom code is as follows depending on whether a pull-up resistor is provided. pull-up resistor c 7 to c 3 of higher 8 bits of custom code ki/o 6 ki/o 7 c 7 c 6 c 5 c 4 c 3 not provided not provided 0 0 0 0 0 not provided provided 1 0 0 1 1 provided not provided 1 0 0 0 0 provided provided 1 1 1 0 1 caution in ver ii, it is not possible to set all custom codes. also, new custom codes cannot be ordered for ver ii products; therefore, ver i products should be used if new custom codes are required. pin connected to ccs pin ki/o 0 ki/o 1 ki/o 2 ki/o 3 ki/o 4 ki/o 5 ki/o 6 ki/o 7 c 2 0 0 0 0 1 1 1 1 c 1 0 0 1 1 0 0 1 1 c 0 0 1 0 1 0 1 0 1 when ccs pin is open, (c 2 c 1 c 0 ) = (0 0 0) * *
m pd6121, 6122 9 figure 3-3. example of custom code setting for ver ii specifications ( m pd6121-002, 6122-002) configuration example c 2 , c 1 and c 0 of the higher 8 bits of the custom code are fixed by connecting the ccs pin to ki/o 0 to ki/ o 7 . therefore, in the configuration example, they become 1 0 0 . c 0 c 1 c 2 c 7 , c 6 , c 5 , c 4 and c 3 of the higher 8 bits of the custom code are selected and fixed by the pull-up resistor connected to ki/o 6 and ki/o 7 in four channels. in this configuration example, c 3 to c 7 of the higher 8 bits of the custom code become 1 1 0 1 1 . c 3 c 4 c 5 c 6 c 7 the inversion/non-inversion of the lower 8 bits of the custom code is fixed by the bit of the external pull- up resistor of ki/o 0 to ki/o 5 . caution c 6 and c 7 are fixed to 0. ccs ki/o 0 ki/o 1 ki/o 2 ki/o 3 ki/o 4 ki/o 5 ki/o 6 ki/o 7 v dd v dd v dd v dd connection of any one line : connected : not connected rom3 selector c 7 1 0 1 1 c 6 0 0 1 1 c 5 1 1 0 1 c 4 1 1 1 1 c 3 0 1 1 1 ki/o 6 disconnected disconnected connected connected ki/o 7 disconnected connected disconnected connected pull-up resistor bit for non-inversion of custom code is set 1: non-inversion for c 0 to c 7 0: inversion for c 0 to c 7 external setting (refer to configuration example) 101000 00 c 0 ? 1 ? 2 ? 3 ? 4 ? 5 c 6 c 7 lower 8 bits of custom code pull-up resistor bit (ki/o 0 , ki/o 2 ) * *
m pd6121, 6122 10 as noted above, setting the pull-up resistor and connection, produces the following custom code. custom code remark codes are transmitted from the lsb. c 0 1 c 0 lower 8 bits of custom code 1 c 0 higher 8 bits of custom code 1000100 1 0 1 1 0 0 1 c 1 c 2 c 3 c 4 c 5 c 6 c 7 c 1 ? 2 ? 3 ? 4 ? 5 ? 6 ? 7 c 1 c 2 c 3 c 4 c 5 c 6 c 7 *
m pd6121, 6122 11 18 ms to 36 ms 3 27 ms 4.5 ms 9 ms 13.5 ms leader code custom code 8 bits custom code 8 bits data code 8 bits data code 8 bits stop bit 1 bit 58.5 ms to 76.5 ms rem output 4. remote output waveform (nec transmission format: one-shot command transmission mode) when f osc = 455 khz (1) remote (rem) output (from stage 2 , transmission occurs only when key is kept depressed) (2) magnification of stage 1 (3) magnification of waveform 3 (4) magnification of waveform 2 (5) carrier waveform (magnification of high period of codes) remark if a key is kept depressed, the second and subsequent times, only the leader code and the stop bit are transmitted, which allows power savings for the infrared-emitting diode. if a command is issued continuously in the same way the second and subsequent times as the first time, refer to 7. one-shot/continuous command transmission mode . 1.125 ms 9 ms 13.5 ms 4.5 ms 0.56 ms 2.25 ms 01 100 rem output 58.5 to 76.5 ms 108 ms 108 ms 1 2 rem output 9 ms 11.25 ms 2.25 ms leader code 0.56 ms stop bit rem output rem output 9 ms or 0.56 ms carrier frequency: fc = fosc/12 = 38 khz 8.77 ? 26.3 ?
m pd6121, 6122 12 5. key data codes (single input) key k1 k2 k3 k4 k5 k6 k7 k8 k9 k10 k11 k12 k13 k14 k15 k16 k17 k18 k19 k20 k21 k22 k23 k24 k25 k26 k27 k28 k29 k30 k31 k32 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? m pd6121 ? m pd6122 ? m pd6122 only ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? notes m pd1943g m pd1913c unavailable m pd6120c m pd6121g m pd1943g m pd1913c unavailable m pd6120c m pd6121g m pd1943g m pd1913c unavailable m pd6120c m pd6121g m pd1943g m pd1913c unavailable m pd6120c m pd6121g m pd1943g m pd1913c unavailable m pd6120c m pd6121g m pd1943g m pd1913c unavailable m pd6120c m pd6121g m pd1943g m pd1913c unavailable m pd6120c m pd6121g m pd1943g m pd1913c unavailable m pd6120c m pd6121g data code d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 00000010/1 10000010/1 01000010/1 11000010/1 00100010/1 10100010/1 01100010/1 11100010/1 00010010/1 10010010/1 01010010/1 11010010/1 00110010/1 10110010/1 01110010/1 11110010/1 00001010/1 10001010/1 01001010/1 11001010/1 00101010/1 10101010/1 01101010/1 11101010/1 00011010/1 10011010/1 01011010/1 11011010/1 00111010/1 10111010/1 01111010/1 11111010/1 connection ki 4 ki 5 ki 6 ki 7 ki/o * * ki/o 0 * * * * ki/o 1 * * * * ki/o 2 * * * * ki/o 3 * * * * ki/o 4 * * * * ki/o 5 * * * * ki/o 6 * * * * ki/o 7 * * key k33 k34 k35 k36 k37 k38 k39 k40 k41 k42 k43 k44 k45 k46 k47 k48 k49 k50 k51 k52 k53 k54 k55 k56 k57 k58 k59 k60 k61 k62 k63 k64 connection ki 0 ki 1 ki 2 ki 3 ki/o * * ki/o 0 * * * * ki/o 1 * * * * ki/o 2 * * * * ki/o 3 * * * * ki/o 4 * * * * ki/o 5 * * * * ki/o 6 * * * * ki/o 7 * * data code d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 note 00000000/1 10000000/1 01000000/1 11000000/1 00100000/1 10100000/1 01100000/1 11100000/1 00010000/1 10010000/1 01010000/1 11010000/1 00110000/1 10110000/1 01110000/1 11110000/1 00001000/1 10001000/1 01001000/1 11001000/1 00101000/1 10101000/1 01101000/1 11101000/1 00011000/1 10011000/1 01011000/1 11011000/1 00111000/1 10111000/1 01111000/1 11111000/1 notes m pd1913c unavailable m pd6120c m pd1913c unavailable m pd6120c m pd1913c unavailable m pd6120c note bit d 7 is 0 when the sel pin is connected to v dd , and 1 when it is connected to v ss . *
m pd6121, 6122 13 6. double-input operation all keys are provided with a multiple-input prevention circuit. when two or more keys are pressed simulta- neously, no signal is transmitted; but when the keys k21 and k22, k21 and k23, or k21 and k24 are pressed together, d 5 is set to 1. however, the way keys are pressed determines the priority: if k22/k23/k24 are pressed 126 ms or longer after k21 is pressed, transmission is performed in this mode. double-input key operation is ideally suited for tape recording error prevention applications. double-input operation key codes key d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 k21 + k22 10101100/1 k21 + k23 01101100/1 k21 + k24 11101100/1 double-input operation timing 1 double-input transmission 2 no operation 3 no operation 4 no operation k21 code transmission t > 126 ms k21 push k22/k23/k24 push d 5 + k22/k23/k24 code transmission k21 code transmission 36 ms < t < 126 ms k21 push k22/k23/k24 push transmission stop ?6 ms < t < 36 ms k21 push k22/k23/k24 push no transmission k21 push k22/k23/k24 push t > 126 ms k22/k23/k24 code transmission transmission stop
m pd6121, 6122 14 7. one-shot/continuous command transmission mode 7.1 one-shot command transmission mode in order to reduce the average transmission current, the m pd6120c, 6121g, and 6122g transmit data only once, and thereafter transmit just the leader code and stop bit indicating that a key is depressed. as a result, this transmission method (one-shot command transmission mode) has the following characteristics. advantages ? average transmission current is reduced to 1/3 to 1/4 compared with continuous command transmission mode ? reduced software load for reception program (not all commands are processed all the time) ? this mode distinguishes when a key is pressed several times successively and when a key is kept depressed. disadvantages ? if a command is not read the first time, it cannot be read a second time ? if a signal transmission is interrupted while continuous commands are executed, subsequent commands cannot be executed. moreover, when f osc = 455 khz, the average current to the infrared-emitting diode is roughly equivalent to 3 % of the peak current. i ave = (9 ms + 0.56 ms)/108 ms x 1/3 (duty) = 2.95 % (first command is ignored) 7.2 continuous command transmission mode a continuous command transmission mode for transmitting data a second or more times is also available. as shown in figure 7-2, it is possible to continuously transmit commands for all the keys or for individual key output lines simply by adding a diode d and connecting it to ki 0 or ki/o. in this case, the average transmission current is larger than that in the one-shot command transmission mode. when f osc = 455 khz, the average current to the infrared-emitting diode is roughly equivalent to 9 % of the peak current. i ave = (9 ms + 0.56 ms x 33)/108 ms x 1/3 (duty) = 8.48 % cautions 1. if the double input key (k21-k24) is used in the continuous command transmission mode, double-input key transmission is not performed (d 5 does not become 1). 2. when the voltage drop of the rem output is large, the signal is not transmitted accurately. therefore, keep the rem output current within 1 ma. figure 7-1 shows the continuous command transmission mode.
m pd6121, 6122 15 figure 7-1. continuous command transmission mode (when f osc = 455 khz) (1) m pd6120c, 6121g, 6122g (2) m pd1913c, 1943g, 6102g 1 k 1 to k 20 , k 33 to k 52 (ko 0 to ko 4 ) 2 k 21 to k 32 , k 53 to k 64 (ko 5 to ko 7 ) note in the case of the m pd1913c, 1943g and 6102g, the transmission repeat cycle (t) varies depending on the key. remark i typ = i ave x i peak (led) i ave = (9 ms + 0.56 ms x 33)/t ms x 1/3 (duty) rem output lmp output 58.5 to 76.5 ms 108 ms 31.5 to 49.5 ms average transmission current ratio i typ = 8.48 % x i peak (led) 67.5 ms 38 ms 105.5 ms note rem output lmp output average transmission current ratio i typ = 8.68 % x i peak (led) 67.5 ms 20 ms 87.5 ms note rem output lmp output average transmission current ratio i typ = 10.47 % x i peak (led)
m pd6121, 6122 16 figure 7-2. application circuit for continuous command transmission mode 1 continuous command transmission for all keys note 1 rem output is input to ki 0 with diode d. 2 continuous command transmission for key output lines rem output is input to ki/o with diode d. continuous command transmission can be performed for keys whose ki/o output lines have received diode d input note 2 . notes 1. double-key transmission cannot be performed. 2. if the ki/o 5 output line (double-input key) is in the continuous command transmission mode, double-input key transmission is not performed (d 5 does not become 1). caution when the voltage drop of the rem output is large, the signal is not transmitted accurately. therefore, keep the rem output current within 1 ma. 220 pf 455 khz osco osci v dd lmp 220 pf rem v ss 100 w 82 w 2.2 k w 12 k w v dd v dd ccs ki 2 ki 0 ki 3 ki 1 ki/o 0 ki/o 1 ki/o 2 ki/o 3 ki/o 4 ki/o 5 ki/o 6 ki/o 7 ?d6121g-001 ?d6121g-002 ceramic resonator transmission display 47 ? + - custom code selection resistor diode d key matrix custom code selection diode 220 pf 455 khz osco osci v dd lmp 220 pf rem v ss 100 w 82 w 2.2 k w 12 k w v dd v dd ccs ki 2 ki 0 ki 3 ki 1 ki/o 0 ki/o 1 ki/o 2 ki/o 3 ki/o 4 ki/o 5 ki/o 6 ki/o 7 ?d6121g-001 ?d6121g-002 ceramic resonator transmission display 47 ? + - custom code selection resistor diode d custom code selection diode *
m pd6121, 6122 17 8. application circuit example (1) example application circuit using m pd6121 (2) example application circuit using m pd6122 + v dd v dd = osco osci v dd lmp rem v ss ccs ki 0 ki 3 ki/o 0 ki/o 7 ?d6121g-001 sel 3v 455 khz ceramic resonator infrared-emitting diode se303a-c se307-c se313 se1003-c 2sc2001, 3616 2sd1513, 1616 2sd1614 custom code selection resistor key matrix 8 x 4 = 32 keys custom code selection diode + osco osci v dd lmp rem v ss ccs ki 0 ki 7 ki/o 0 ki/o 7 ?d6122g-001 sel 3v 455 khz ceramic resonator infrared-emitting diode se303a-c se307-c se313 se1003-c 2sc2001, 3616 2sd1513, 1616 2sd1614 custom code selection resistor key matrix 8 x 8 = 64 keys custom code selection diode v dd v dd
m pd6121, 6122 18 (3) application circuit example, receive side note the m pc2801as active level is high. in out int preamplifier (amplification, waveform shaping) ?c2803 ?c2804 ?c2800a, 2801a note shield case 17k series 75x series 75xl series 78k series key input display control communica- tions microcomputer pin photo diode ph302c ph310 ph320 *
m pd6121, 6122 19 9. electrical specifications absolute maximum ratings (t a = 25 c) parameter symbol ratings unit supply voltage v dd C0.3 to +6.0 v input voltage v i C0.3 to v dd + 0.3 v power dissipation p d 250 mw operating ambient temperature t a C20 to +75 ?c storage temperature t stg C40 to +125 ?c recommended operating conditions (t a = C20 to +75 c) parameter symbol min. typ. max. unit supply voltage v dd 2.0 3.0 3.3 v oscillation frequency f osc 400 455 500 khz input voltage v i 0v dd v custom code select pull-up resistor r up 160 200 240 k w dc characteristics (t a = 25 c, v dd = 3.0 v) parameter symbol condition min. typ. max. unit supply current 1 i dd1 f osc = 455 khz 0.1 1 ma supply current 2 i dd2 f osc = stop 1 m a rem output current high i oh1 v o = 1.5 v C5 C8 ma rem output current low i ol1 v o = 0.3 v 15 30 m a lmp output current high i oh2 v o = 2.7 v C15 C30 m a lmp output current low i ol2 v o = 0.3 v 1 1.5 ma ki input current high i ih1 v i = 3.0 v 10 30 m a ki input current low i il1 v i = 0 v C0.2 m a ki, sel input voltage high v ih1 2.1 3.0 v ki, sel input voltage low v il1 0 0.9 v ki/o input voltage high v ih2 1.3 v ki/o input voltage low v il2 0.4 v ki/o input current high i ih2 v i = 3.0 v 2 7 m a ki/o input current low i il2 v i = 0 v C0.2 m a ki/o output current high i oh3 v o = 2.5 v C1.0 C2.5 ma ki/o output current low i ol3 v o = 1.7 v 35 100 m a ccs input voltage high v ih3 1.1 v ccs input current high i ih3 pull-up, v i = 3.0 v 0.2 m a ccs input current low i il3 pull-up, v i = 0 v C3 C8 m a ccs input current high i ih4 pull-down, v i = 3.0 v 10 30 m a ccs input current low i il4 pull-down, v i = 0 v C0.2 m a
m pd6121, 6122 20 recommended ceramic resonators (t a = C20 to +75 c, v dd = 2.0 to 3.3 v) ? m pd6121, 6122 maker product recommended constant [pf] operating voltage [v] c 1 c 2 min. max. murata seisakusho corp. csb455e 220 220 2.0 3.3 csb480e 220 220 2.0 3.3 toko corp. crk455 120 300 2.0 3.3 kyocera corp. kbr-455btlr 220 220 2.0 3.3 example of external circuit caution if using an oscillation circuit, wire the area enclosed in the dotted line in the figure in the manner indicated below in order to avoid negative effects such as from stray capacitance of wires. ? keep wiring as short as possible. ? do not cross other signal lines. do not design wiring close to lines with large fluctuating current. ? make sure that the connection point of the oscillation circuits capacitor has the same potential as v dd . ? do not extract signals from the oscillation circuit. v dd c2 c1 osci osco
m pd6121, 6122 21 10. package drawings (1) package for the m pd6121 * 20 pin plastic sop (375 mil) item millimeters inches a b c e f g h i j 13.00 max. 1.27 (t.p.) 2.9 max. 2.50 10.3?.3 0.78 max. 0.12 1.6 7.2 m 0.125?.075 n 0.512 max. 0.031 max. 0.005?.003 0.115 max. 0.098 0.406 0.283 0.063 0.005 0.050 (t.p.) p20gm-50-375b-4 p3 3 +7 a note each lead centerline is located within 0.12 mm (0.005 inch) of its true position (t.p.) at maximum material condition. d 0.40 0.016 +0.10 ?.05 k 0.15 0.006 +0.10 ?.05 l 0.8?.2 0.031 0.15 ? +7 ? 0.006 +0.009 ?.008 +0.004 ?.002 +0.004 ?.003 +0.012 ?.013 m 110 11 20 m d c b f g e k h i j n p detail of lead end l
m pd6121, 6122 22 (2) package for the m pd6122 * 24 pin plastic sop (375 mil) item millimeters inches a b c e f g h i j 15.54 max. 1.27 (t.p.) 2.9 max. 2.50 10.3?.3 0.78 max. 0.12 1.6 7.2 m 0.1?.1 n 0.612 max. 0.031 max. 0.004?.004 0.115 max. 0.098 0.406 0.283 0.063 0.005 0.050 (t.p.) p24gm-50-375b-3 p3 3 +7 a g note each lead centerline is located within 0.12 mm (0.005 inch) of its true position (t.p.) at maximum material condition. d 0.40 0.016 +0.10 ?.05 k 0.15 0.006 +0.10 ?.05 l 0.8?.2 0.031 0.15 ? +7 ? 0.006 +0.009 ?.008 +0.004 ?.002 +0.004 ?.003 +0.012 ?.013 p detail of lead end m 24 13 112 f e c dm b i h j n l k
m pd6121, 6122 23 11. recommended soldering conditions the following conditions (see table below) must be met when soldering this product. for more details, refer to the nec document semiconductor device mounting technology manual (iei-1207) . please consult an nec sales representative in case an other soldering process is used, or in case soldering is done under different conditions. table 11-1. soldering conditions for surface mounting m pd6121g-001: 20-pin plastic sop (375 mil) m pd6121g-002: 20-pin plastic sop (375 mil) m pd6122g-001: 24-pin plastic sop (375 mil) m pd6122g-002: 24-pin plastic sop (375 mil) soldering process soldering conditions symbol infrared ray reflow peak temperature of package surface: 230 c, ir30-00-1 reflow time: 30 seconds or less (210 c or higher), number of reflow processes: 1 vps peak temperature of package surface: 215 c, vp15-00-1 reflow time: 40 seconds or less (200 c or higher), number of reflow processes: 1 wave soldering solder temperature: 260 c or lower, ws60-00-1 reflow time: 10 seconds or less, number of reflow processes: 1 preheat temperature: 120 c or lower (at package surface) partial heating pin temperature: 300 c or lower, time: 3 seconds or less (per device side) caution do not apply more than one soldering method at any one time, except for the partial heating method. *
m pd6121, 6122 24 appendix. remote control transmission ic and microcontroller list ? single-function remote control transmission ics (nec transmission format) part number m pd6121 m pd6122 parameter operating voltage v dd = 2.0 to 3.3 v operating clock f osc = 400 to 500 khz ceramic resonator transmission format leader 16-bit custom code 8-bit data code 8-bit data code modulation method ppm 0 1 38-khz carrier modulation (fosc = 455 khz) custom code 16-bit setting data code 32 x 2 64 x 2 no. of keys 32 64 package 20-pin sop (375 mil) 24-pin sop (375 mil) cautions 1. new custom codes are not available for the following standard products. m pd6121g, 6122g ver ii standard products (-002) 2. if products other than listed in caution 1 are used, please contact nec for custom codes. *
m pd6121, 6122 25 ? single-function 4-bit single-chip microcontroller part number m pd6133 m pd6134 m pd6604 note 1 parameter rom capacity 512 x 10 bits 1002 x 10 bits ram capacity 32 x 4 bits oscillator ceramic oscillator rc oscillator s 0 (s-in) read with p 01 register (left shift instruction excluded, standby cancellation function provided) s 1 /led (s-out) i/o (standby cancellation function provided) key matrix (without di) 8 x 6 = 48 keys timer clock f x /8, f x /16 stack also usable for ram r f (1 level) carrier frequency f x , f x /8, f x /12, high level f x /2, f x /16, f x /24 (software specified) instruction execution time 8 m s (f x = 1 mhz) operating frequency f x = 300 khz to 1 mhz power supply voltage v dd = 1.8 to 3.6 v operating ambient temperature t a = C40 to +85 c charge/discharge function (nop) not provided (nop instruction provided) low voltage detector low level is output to reset pin at detection package ? 20-pin plastic sop ? 20-pin plastic sop ? 20-pin plastic sop ? 20-pin plastic shrink dip ? 20-pin plastic shrink sop prom version m pd61f35 (flash eeprom tm ) note 2 notes 1. under development 2. this products pin configuration is the same as that of the 20-pin m pd6133, 6134, and 6604, but the package is a 24-pin sop shrink dip package. caution if using the nec transmission format, please contact nec for the custom code. *
m pd6121, 6122 26 ? 4-bit single-chip microcontroller for programmable remote control transmission part number m pd6600 m pd6600a m pd6124 m pd6124a m pd6125a parameter rom capacity 512 x 10 bits 1002 x 10 bits ram capacity 32 x 5 bits oscillator ceramic oscillator s 0 (s-in) read with left shift instruction s 1 /led (s-out) output key matrix (without di) 8 x 4 = 32 keys 8 x 8 = 64 keys timer clock f x /8 stack also usable for ram (3 levels) carrier frequency f x /8, f x /12 (mask option) instruction execution time 16 m s (f x = 500 khz) operating frequency f x = 400 khz to 500 khz power supply voltage v dd = 2.0 to 3.6 v v dd = 2.2 to 3.6 v v dd = 2.0 to 6.0 v v dd = 2.2 to 5.5 v v dd = 2.0 to 6.0 v operating ambient temperature t a = C20 to +75 c charge/discharge function (nop) provided low voltage detector not provided low level is not provided low level is not provided output to ouput to s-out pin s-out pin at detection at detection package ? 20-pin plastic sop ? 24-pin plastic ? 20-pin plastic shrink dip sop ? 24-pin plastic shrink dip prom version m pd61p24 (one-time prom) caution if using the nec transmission format, please contact nec for the custom code. *
m pd6121, 6122 27 notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. produc- tion process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function.
m pd6121, 6122 28 no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec corporation. nec corporation assumes no responsibility for any errors which may appear in this document. nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. while nec corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. to minimize risks of damage or injury to persons or property arising from a defect in an nec semiconductor device, customer must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. nec devices are classified into the following three quality grades: standard, special, and specific. the specific quality grade applies only to devices developed based on a customer designated quality assurance program for a specific application. the recommended applications of a device depend on its quality grade, as indicated below. customers must check the quality grade of each device before using it in a particular application. standard: computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots special: transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) specific: aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec devices in standard unless otherwise specified in nec's data sheets or data books. if customers intend to use nec devices for applications other than those specified for standard quality grade, they should contact nec sales representative in advance. anti-radioactive design is not implemented in this product. m4 94.11 the application circuits and their parameters are for references only and are not intended for use in actual design-in's.

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